Free Practice Quiz Question List

3 CPU Architecture Online Quiz Questions

Use this free practice quiz with 20 questions to review 3 CPU Architecture, test your knowledge, and prepare for your next test or exam.

20 questions
01
Choose one
1 point

A processor takes a branch instead of continuing with the next sequential instruction. What happens to the program counter (PC)?

  1. A

    It keeps the address of the instruction currently being decoded.

  2. B

    It is updated to identify the branch destination instruction.

  3. C

    It stores the result produced by the ALU.

  4. D

    It records whether the last result was zero or negative.

02
Choose one
1 point

Which description best explains how the control unit coordinates an instruction's execution?

  1. A

    The register file performs the arithmetic and logical operations.

  2. B

    The ALU decodes instructions and chooses the destination register.

  3. C

    The control unit decodes instructions and issues signals to direct the datapath.

  4. D

    The datapath stores the address of the next instruction.

03
Choose one
1 point

A datapath has several possible values that could be sent to one destination. What role do multiplexers or other routing logic serve?

  1. A

    They select which value is routed to a destination.

  2. B

    They store the instruction currently being executed.

  3. C

    They perform every arithmetic operation in place of the ALU.

  4. D

    They update the PC whenever a result is zero.

04
Choose one
1 point

A processor must signal that a memory operation is a write rather than a read. Which signal category communicates that action?

  1. A

    Address signals carry values being transferred.

  2. B

    Control signals can indicate whether a read or write action should occur.

  3. C

    Data signals identify the memory location being accessed.

  4. D

    Control signals always carry the operand to the ALU.

05
Choose all
1 point

Select all statements that correctly describe general-purpose registers or a register file.

  1. A

    General-purpose registers can hold operands used by instructions.

  2. B

    General-purpose registers can hold addresses or intermediate results.

  3. C

    A register file is the component that performs all ALU arithmetic.

  4. D

    A register file can provide selected values to the datapath and accept results to store.

06
Choose all
1 point

Select all statements that correctly describe system-level data, address, and control signals.

  1. A

    Data signals carry values being transferred.

  2. B

    Address signals identify a memory location or device.

  3. C

    Every computer must use one shared bus for all data, address, and control signals.

  4. D

    Control signals can indicate actions such as reading or writing.

07
True or false
1 point

An ALU can produce status information indicating that its result is zero.

  1. A

    True

  2. B

    False

08
True or false
1 point

Every processor completes each instruction in exactly one clock cycle.

  1. A

    True

  2. B

    False

09
Written response
1 point

Which special-purpose register holds the address of the next instruction to fetch?

10
Written response
1 point

Registers R1 and R2 contain 77 and 55. An instruction adds them and stores the result in R3. What value is written to R3?

11
Written response
1 point

What is the standard name for a group of general-purpose registers organized to provide selected values and accept results?

12
Fill in the blank
1 point

In the system-level signal categories, signals carry the values being transferred.

13
Fill in the blank
1 point

A records conditions such as whether a result is zero or negative.

14
Open ended
1 point

Explain how the PC, control logic, datapath, and ALU work together to execute an instruction that adds the values in R1 and R2 and writes their sum to R3.

15
Choose one
1 point

A processor must add two values held in registers. Which description correctly identifies the roles of the datapath and ALU?

  1. A

    The control unit routes values between registers and the ALU, while the ALU chooses which instruction to decode.

  2. B

    The datapath routes register values to the ALU, which performs the selected operation.

  3. C

    The register file decodes instructions, while the datapath stores the program counter.

  4. D

    The ALU fetches instructions from memory, while the control unit stores their results.

16
Choose one
1 point

A CPU is writing a value to a specified memory location. Which signal type indicates that the write action should occur?

  1. A

    An address signal identifies the memory location to access.

  2. B

    A data signal carries the value being written to memory.

  3. C

    A control signal indicates that a write action should occur.

  4. D

    A data signal indicates the result of an ALU comparison.

17
True or false
1 point

Every processor’s ALU must perform shifting operations.

  1. A

    True

  2. B

    False

18
Choose one
1 point

An instruction adds the values in R1 and R2 and writes the result to R3. Which sequence best describes the control logic’s role in this operation?

  1. A

    Select the source registers, direct the ALU to add, and enable writing the result to the destination register.

  2. B

    Add the values inside the PC, then direct the datapath to decode the result.

  3. C

    Have the ALU select the registers and the control unit carry the result to the destination.

  4. D

    Store the instruction in the status register, then use the ALU to fetch the operand values.

19
Written response
1 point

An instruction adds the value 7 in R1 to the value 5 in R2 and writes the result to R3. What integer value is written to R3?

20
Choose one
1 point

A branch is taken, so execution continues at a different instruction than it otherwise would. What should the PC identify after the branch?

  1. A

    The address of the instruction that was just decoded.

  2. B

    The address of the destination register for the branch result.

  3. C

    The value produced by the branch instruction’s ALU operation.

  4. D

    The address of the instruction to fetch next, which may be at the branch target.