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Free Practice Quiz Question List

4 Machine Instructions Online Quiz Questions

Use this free practice quiz with 20 questions to review 4 Machine Instructions, test your knowledge, and prepare for your next test or exam.

20 questions
01
Choose one
1 point

In the example instruction ADD R1, #5, what addressing mode supplies the value 5?

  1. A

    Register addressing

  2. B

    Immediate addressing

  3. C

    Register indirect addressing

  4. D

    PC-relative addressing

02
Fill in the blank
1 point

The arrangement that divides an instruction's bits into fields such as an opcode and register fields is its .

03
True or false
1 point

Every machine instruction must read an operand from data memory before it can execute.

  1. A

    True

  2. B

    False

04
Choose all
1 point

Which statements correctly describe common instruction-format fields? Select all that apply.

  1. A

    An opcode identifies the operation the instruction requests.

  2. B

    Register fields identify registers used as sources or destinations.

  3. C

    The opcode always specifies the exact memory address of every operand.

  4. D

    An operand or address field may provide a value, an address, or information used to calculate an address.

05
Written response
1 point

A load instruction uses a register's contents as the memory address from which to read its operand. What addressing mode is this?

06
Written response
1 point

Which register identifies the address of the next instruction to be fetched?

07
Choose one
1 point

An ISA uses instructions with different lengths. What determines how far the PC advances when an instruction is fetched?

  1. A

    It always advances by one byte, regardless of the instruction.

  2. B

    It advances only after the instruction has been written back.

  3. C

    Its advancement depends on the ISA and the instruction's length.

  4. D

    It advances by the number of registers named in the instruction.

08
Choose all
1 point

Which actions may occur while the CPU executes an instruction, depending on that instruction? Select all that apply.

  1. A

    The CPU may perform an arithmetic or logical operation.

  2. B

    The CPU must write a result to both a register and memory.

  3. C

    The CPU may read from or write to memory.

  4. D

    The CPU may make a control-flow decision.

09
Fill in the blank
1 point

During the fetch step, the CPU reads the instruction from memory into the .

10
True or false
1 point

When a conditional branch's condition is satisfied, does the CPU change the program counter to follow the branch?

  1. A

    True

  2. B

    False

11
Open ended
1 point

Compare PC-relative addressing with base-plus-offset addressing. For each, explain what is used as the reference point to calculate the address and give a typical use.

12
True or false
1 point

A processor can overlap instruction stages using a pipeline while still preserving the program's defined results.

  1. A

    True

  2. B

    False

13
Choose one
1 point

In the example notation 8(R3), what memory location does the operand refer to?

  1. A

    The address held in R3

  2. B

    The address eight units above the address held in R3

  3. C

    The value stored directly in R3

  4. D

    The address of the next instruction

14
Choose one
1 point

A processor's documentation defines its supported instructions, their meanings, and how their bits are organized. What does this describe?

  1. A

    The register that holds the instruction being decoded

  2. B

    The memory address calculated by an addressing mode

  3. C

    The specification of supported instructions, their meanings, and their bit organization

  4. D

    The circuitry that performs arithmetic operations

15
Choose one
1 point

Which instruction field identifies the operation the processor is being asked to perform?

  1. A

    A register field

  2. B

    An opcode

  3. C

    An address field

  4. D

    A control field

16
Choose one
1 point

In the illustrative instruction ADD R1, #5, where does the operand value 5 come from?

  1. A

    The value 5 is part of the instruction.

  2. B

    The value 5 is stored in R1.

  3. C

    The value 5 is stored at a memory address named in the instruction.

  4. D

    The value 5 is calculated from the program counter.

17
Choose one
1 point

If R3 contains address 1000, an instruction that accesses its operand through (R3) obtains the operand from where?

  1. A

    The operand is the value stored in R3.

  2. B

    The instruction contains the operand's memory address directly.

  3. C

    The operand is stored in memory at the address held in R3.

  4. D

    The operand is stored at an address calculated from the PC.

18
Choose one
1 point

What is the defining feature of PC-relative addressing for a branch target?

  1. A

    The target is always a fixed absolute address encoded in full.

  2. B

    The target is calculated relative to the PC, often using a signed offset.

  3. C

    The target is the memory address stored in a general-purpose register.

  4. D

    The target is the operand value embedded in the instruction.

19
Written response
1 point

R3 contains address 1000. In the illustrative notation 8(R3), what is the effective address? Enter the base-10 integer address with no units.

20
Written response
1 point

An instruction specifies memory address 2400, and the operand is stored at that address. Which addressing mode is being used?